Keynote Speakers
An exciting keynote is confirmed to be given by Kun Wang (UCLA).
FPGA-based AI Processor
Kun Wang
UCLA
The rapid advancement of Artificial Intelligence (AI) is making our daily life easier with smart assistants, such as automatic medical analyzer, bank plagiarism checkers, and traffic predictions. Among all AI algorithms, deep learning algorithms, especially deep convolutional neural networks (DCNNs), have achieved top performance on AI tasks. However, the dramatically better performance of DCNNs comes with a cost of more computation complexity compared with traditional methods, which calls for hardware acceleration. Customized FPGA accelerators have been widely explored since 2016, demonstrating FPGA as a promising solution. However, designing a high-performance accelerator for a certain network can be time-consuming as it involves vast design optimizations, such as memory bandwidth optimization, area and timing tuning, and software-hardware interface development. Therefore, an auto-code generator that can produce target codes based on FPGA constraints and network configurations can be an efficient end-to-end solution. This talk will provide an initial toolchain for an FPGA-based AI processor. The toolchain can compile DCNNs from popular deep learning frameworks and map the DCNNs to the FPGA-based AI processor for acceleration, which greatly reduced the human effort. During the compilation, the networks are quantized with negligible accuracy loss to reduce bandwidth requirements and computation resources. Moreover, a domain-specific instruction set with optimized granularity is defined to ensure flexibility and efficiency. Finally, we focus on accelerator cards and applications for edge and cloud scenarios.
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Keynote Speakers
Kun Wang
UCLA - Paper Submission Deadline:
April 9th - 11:59PM AOE
May 7th - 11:59PM AOE (Final) - Author Notification:
May 24th - WiP and Demo Deadline:
May 7th - 11:59PM AOE - Workshop Event:
June 25th 2021